Chipmaker AMD has hinted that new transistor technology will keep Moore’s Law alive for the next six to eight years, but as one might guess, it will cost more.
Meanwhile, the company plans to launch new chips based on its Zen 4 architecture next year, including Bergamo, which aims to compete against Arm-based chips for cloud-native computing.
In an interview with Wells Fargo analyst Aaron Rakers at the financial company’s TMT Summit, AMD CTO Mark Papermaster spoke about future directions and the company’s near-term roadmap.
Rakers asked about the Zen family and its chiplet-based architecture versus the monolithic architecture seen in Intel’s CPUs and whether this would continue to serve AMD over the next four to five years or whether another novel approach might be needed .
“Innovation always finds its way around barriers,” said Papermaster. “I see exciting new transistor technology for the next — as far as you can really tell these things — in about six to eight years, and I’m very, very clear about the advances we’re going to make to keep improving transistor technology, but they’re more expensive.” “, he said.
In the past, chipmakers like AMD and Intel could double transistor density every 18 to 24 months and stay within the same budget, but that’s no longer the case, Papermaster claimed.
“So we’re going to have innovations in transistor technology. We will have more density. We will have less power, but it will cost more. So the way you put together solutions needs to change,” he said.
Part of this has already been addressed, according to Papermaster, with AMD’s Infinity architecture, which enabled the modular approach of chiplet architecture, where a chip is made up of multiple chips, potentially manufactured using different process nodes and connected together via a standardized interconnect.
“Chiplets are really a way to just think about how the semiconductor industry is going,” he said.
This “is going to keep the innovation going and we’re going to keep, I would say, an equivalent of Moore’s Law, which means you keep really doubling that ability every 18 to 24 months, [this] is the innovation of how the solution is put together,” he added.
That means the future will be heterogeneous, according to Papermaster, although we’ve already walked that path at the system level when looking at how CPUs and GPUs are paired to accelerate specific workloads.
“So you have to use accelerators, GPU acceleration, specialized functions and adaptive computation like we acquired with Xilinx, which closed in February this year,” he said.
“Those elements have to come together and you’re going to see tremendous innovation in how those come together and it’s going to really keep us on track, and actually we have to because you can just look at the requirements of computer science, they don’t have an iota slowed down. In fact, they’re escalating rapidly as AI becomes more prominent,” Papermaster explained.
Meanwhile, hyperscale cloud customers are increasingly asking for platforms optimized for critical workloads, particularly in terms of performance and power efficiency, and this has shaped AMD’s evolution, according to Papermaster.
Speaking about the newly launched fourth-generation Epyc “Genoa” processor, he claimed that it provides customers with a total cost of ownership advantage and delivers it in a timely manner.
“Genoa capitalizes on the fact that we took the CPU complex and moved it from 7nm to 5nm. Remember what I said before, new transistors still give you more density and more power per watt. So we combine 5nm on the CPU with our design techniques and we’ve improved computational efficiency by 48 percent,” Papermaster said.
“So that’s a huge generational gain in performance per watt. And so we can go from 64 cores in a single socket to 96 cores in a single socket.”
But the company is also trying to give hyperscale customers more choices.
“Our stack now has incredible top-to-bottom coverage, with the kind of granularity our customers need to really cover hyperscale through enterprise, and we’re adding what we’re calling Bergamo in the first half of this year, the with our zen will be 4c,” he said.
Bergamo is still Zen 4, it runs code like Genoa but it’s half the size, Papermaster added, which will compete head-to-head with Graviton and Arm-based solutions that don’t require maximum frequency.
“Let’s say you’re running workloads like Java workloads or throughput workloads that don’t need to run at peak frequency, but you need a lot of cores. So let’s add that in the first half of 2023. And later in 2023, we add Sienna, a variant aimed at the telecom space. So we’re really excited about our TAM growth in servers,” he said.
Siena, unveiled at AMD’s Financial Analyst Day in June, appears designed for intelligent edge and telecom applications, and as such will potentially compete with Intel’s Xeon D family, which has built-in networking and Quality-of-Service (QoS) features.
Papermaster also mentioned Genoa-X, a fourth-generation version of the Epyc processors but with more than 1GB of L3 cache stacked directly on the CPU chip to power high-performance workloads like EDA (Electronic Design Automation) or database processing to increase . This chip is also expected for 2023.
In response to a question about AMD’s acquisition of FPGA specialist Xilinx and network provider Pensando, Papermaster said, “I don’t think people really realize how important these acquisitions were in terms of rounding out AMD’s portfolio.”
Xilinx is about “adaptive computing,” he claimed, explaining that it’s not just about FPGAs, but Xilinx’s ability to combine an FPGA with ARM processor cores or even implement ARM cores with an FPGA.
“And with Pensando we have a programmable SmartNIC that is absolutely leading. It’s going into Hyperscale and has 144 P4 engines,” Papermaster said. P4 is a programming language for controlling packet forwarding layers in network devices and is likely to play a role in data center microservices, he added.
Finally, Papermaster hinted that AMD hasn’t completely abandoned an Arm-based server processor.
“As some might recall, we had our roadmap eight, nine years ago, both with Arm and x86, and we scrapped Arm in our CPU roadmap because the ecosystem was still too far ahead,” he said .
“We could have done that. We had a design approach that would make the AMD custom arm design as capable as x86, but the ecosystem wasn’t there. So we focused on x86 and said let’s watch the space in Arm,” he added, noting that “Arm is developing a more robust ecosystem now.”
Papermaster said AMD’s current strategy is to “maintain our x86 performance in a way that’s a leadership capability,” but added, “If anyone has reasons they want Arm, we have our custom group, and we happy to work with you to implement our basic solution. We are not married to an ISA.” ®
https://www.theregister.com/2022/12/02/amd_transistor_tech/ AMD says technology will keep Moore’s Law alive for 6 to 8 years • The Register